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To: fyodor_ who wrote (127045)2/9/2001 11:27:44 PM
From: Paul Engel  Read Replies (1) of 186894
 
Fyo - Re: ". As usual, Paul is trying to spin something out of nothing. I'm just pointing at the naked emperor."

BULL SHIT - you're just PLAIN WRONG.

IBM's paper describes a TWO CORE design - at 115 WATTS - at 1.1 GHz

Get your facts straight before you start accusing others of the VERY THING YOU ARE GUILTY OF.

Paul

{============================}
15.2 POWER4 Physical Design

2:00 PM
C. Anderson, J. Petrovich, J. Keaty, G. Nusbaum IBM, Austin, TX

The 4 th -generation POWER processor chip contains 170M transistors and includes 2 microprocessor cores, shared L2, directory for an off-chip L3, and all logic needed to interconnect multiple chips to form an SMP. It is implemented in a 0.18µm SOI technology with 7 layers of Cu interconnect, functions in systems at 1.1 GHz, and dissipates 115W at 1.5V.
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