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To: Tenchusatsu who wrote (128438)2/27/2001 11:16:35 PM
From: Rob Young  Read Replies (1) of 186894
 
Tench,

"It's sometimes called RUMA (i.e. Reasonably UMA)."

Another take: SKUMA Sorta-Kinda UMA

"In my opinion, that's true only for up to 16 EV7 processors (in a 4x4 arrangement). Beyond that, you'll have to go totally NUMA. You can't make 256-CPU UMA or RUMA systems, not even with EV7's architecture."

In a two-D torus, and 4x4 at most you are 4 hops away,
the Router is 13 cycles pin to pin, so that would be
52 cycles at 1000 MHz or 52 ns, setup takes time too
so it isn't near that good. Are all things
accounted for including arbitration? It appears that
way , at least it looks that arbitration tears up
7 cycles, but see for yourself:

alphapowered.com

Worst case memory access in a 16 processor EV7 *appears* to be less than 100 ns.

Re: 256 CPUs?

"Or are you saying it can be done?"

Why not? With 256 CPUs what is the worst case hop? When
you plot all combinations of hops worst case is a very
low percent. Average latency is very good.

Nice too is aggregate memory bandwidth, 12.8 GByte/s direct
attached, 25.6 GByte/s routed.

Heard at IDF McKinley has 3X the memory bandwidth of
Itanium. 6.4 GByte/s... shop and compare!

Rob
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