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Technology Stocks : Advanced Micro Devices - Moderated (AMD)
AMD 214.18-0.5%Dec 31 3:59 PM EST

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To: THE WATSONYOUTH who wrote (34200)3/30/2001 12:07:34 PM
From: fyodor_Read Replies (1) of 275872
 
TWY: To me, the .13um mobile (Thoroughbred) makes the most sense. It should be under 60mm2 on the .13um IBM process and quite inexpensive to manufacture.

I think your 60mm² estimate is too low.

Currently, the Thunderbird comes in at 120mm².

(Mobile) Palomino is expected to have a bunch of new features (PowerNow! for sure, SSE, prefetching, etc. rumored), which will almost certainly increase the die size at least marginally.

Add another 25mm² for the additional 256kB L2 cache expected to be present on the Tbred and you get around 150mm² on .18mu, where roughly 50mm² is L2 cache. AMD's SRAM cell size is unbelievably huge, so let's reduce this by 1/3.

That brings Tbred to 133mm² on .18mu.

Assuming ideal die size reduction when going to .13mu (52% of original size) brings us to 70mm².

I'll stand by my previous estimate of 80mm² ;-)

I have, obviously, not included possible additional metal layers of IBM's .13mu SOI process in the estimate.

-fyo
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