Re: But ain't nobody seein' 'em !!! [Palamino]
It's terribly annoying.
Just dumb luck that Intel blew it with both P4 and Itanic. Who would have expected that not one, but two, huge Intel development efforts would both be such disappointments?
And some unexpected good luck for AMD that thunderbird is scaling far beyond anything expected - reminiscent of the way coppermine's surprisingly good performance kept Intel from being crushed by Athlon - until recently.
And a little more good luck for AMD that they made their big capex moves when demand was high. FABs for the new millenium are characterized by pods for wafer transport, copper interconnect, and .13 feature size or smaller. Half of AMD's in place capacity follows that design - it's proven, in full scale production, and has already been significantly depreciated. Of course, IBM, AMD, and Motorola all claim that their experience indicates that you also need SOI. Too bad for Intel that they are too busy trying to figure out how to FAB copper chips to be able to get anywhere with SOI. Too bad for Intel that they have to build all new production facilities at a time when demand and pricing pressures will make it difficult to ever achieve a non-negative return on those investments.
Intel is making a big deal about its soon to be operational FAB featuring pod transport of wafers and copper interconnects - AMD is well into its second year of volume production using those technologies, and now moving to the next step of SOI integration.
It's a tough time for Intel to have to spend $6 Billion on all new FABs, but they have no choice since their existing plant can't compete with AMD's. And with all the excess wafer capacity in Taiwan, Korea, etc. these days, it looks like there isn't much for Intel to do with its $15 Billion of existing, undepreciated, obsolete, plant and equipment, except to have it torched and try to collect on the insurance. Does Barrett have Tony Soprano's number?
;-)
Dan |
