John,
Do you think that Otellini's comment, that Rambus would have a much more significant performance effect when the P4 is over 2 GHz, is reasonable? Could MHz be a factor in the memories performance?
I have no idea what they mean, other than what a used car salesman means when he goes through his spiel. Rambus, or memory access in general is not like rocket which as it goes higher, the force of gravity becomes weaker. Just the opposite.
The only thing I can possibly come up with that is remotely reasonable is that above 2 GHz P4s are .13u, and the .13u is rumored to have bigger L2. So there is a possibility that Intel will make the prefetching algorithm more aggressive, wasting a lot of bandwidth in order to lower cache misses, and therefore achieve lower memory latency.
Thay also had a chart from Samsung (?) that projected Rambus v. SDRAM prices almost at parity within about 6-12 months.)
They have been saying this ever since Intel started using Rambus, that is, 18 months ago, they said that Rambus will achieve parity in 6 to 12 months.
Joe |
