> "I've been wondering why people think we need a new fab.
> Don't they realize that when Dresden is converted to 130
> nanometers it will almost double production? It's almost
> as if AMD is building a new fab by doing that. Doubling
> Athlon production in a year and a half or so seems fine to
> me and is easily sufficient to raise market share over the
> 30% target."
Of course, that target is December 2001. :p
More seriously, though, we have to remember that the market for processors increases in size as time goes forward. A year from now, the PC market in terms of units will probably increase by fifteen percent or more. In addition, AMD wants to increase its market share by fifty percent. That there is a 72.5% increase in unit capacity required.
Now ... in a year and a half, AMD *should* be ramping into the K8 family. Clawhammer, which will likely account for the lion's share of the K8 units, measures around 100sqmm at 130nm. Sledge Hammer is an unknown, but if Jerry has been truthful with his promises, then it will be around 200sqmm, perhaps more.
At 130nm, Tbred, Aloosa, and Burton will probably measure somewhat more than half the area of their 180nm counterparts. And this is ignoring the possibility of AMD increasing the L2 cache size on those microprocessors.
To compound this, I believe that Jerry stated at the last financial report that FAB25 is planned to gradually shift away from microprocessors towards other areas.
Okay, let's math this out. The variables are mostly guesses, but I just want to illustrate a possible scenario here, based on what AMD has told us.
I don't remember the relative sizes of Dresden and Austin, though I do recall that they were somewhat similar. For the sake of argument, I'll normalize the total 180nm capacity of both fabs to 100. Let's just say that Dresden at full capacity would be 55 of that, and Austin would be 45 of that.
Okay, let's fantasize that Dresden will be fully ramped in a year and a half. Dresden is currently at about 62% by my best educated guess. So Dresden's capacity is 34.1, making a current total of 79.1 compared to that normalized scale.
Okay, fast forward to a year and a half from now. Dresden is not only a full capacity, but it is miraculously at full 130nm capacity. I am assuming here that Austin is staying 180nm based on the above quote, though I have no clue about it either way. That'll stick the capacity up to 45+55x2 = 155. Sweet, huh? That's a raw capacity increase of 96.0% compared to the current moment.
Except ... not all of Austin is producing microprocessors anymore. How much of that capacity has been moved off by a year and a half from now? I'm going to totally randomly speculate and say that 30% of that Austin capacity is now making ... I dunno, automobiles or whatever Jerry decides to variate to. This means that the total capacity is really only at 45x0.7+55x2 = 141.5. A year and a half from now, total capacity has actually increased by 78.9%.
Still, under this model, AMD just barely squeaks by that initial 72.5% target increase that I cited at the beginning of this rather meaningless tirade. ;)
But these calculations only apply if the processors being sold happen to be the exact parts being sold today, in the exact same proportions (something like 10% K6-2*, 45% Spitfire/Duron, and 45% Thunderbird/Athlon). Unfortunately, adjusting for process changes, the processors of a year and a half from now could be a lot larger.
To oversimplify everything, I assumed that 130nm would yield a straight doubling in capacity over 180nm. In the same fashion, I'm blindly assuming that doing straight shrinks of current processors would double their yield. Yield would probably increase more than that, but that would only work for me and not against. ;)
Okay. It turns out that the Palomino, at least according to Jerry Sanders (yeah, what does he know?), is larger than the Thunderbird. By the same logic, Morgan will likely be larger than the Duron. In addition, quantity-wise, the incredibly tiny K6 family will be replaced by the incredibly huge K8 family, which will range from (A) approximately double the size of a shrunken Spitfire to (B) approximately thrice the size of a shrunked Thunderbird.
Let me do this another way: Current capacity in terms of silicon area will, in this model, decrease from 100% (45) to 70% (31.5) in Austin and increase by from 62% (34.1) to 100% (55) in Dresden. This means that, in terms of area, capacity will increase from 45+34.1=79.1 to 31.5+55=86.5, a boost of 9.36%. This is not a lot at first, but it ignores the huge benefit from the smaller process. We have to look at the die measurements from that.
The K6-x family, accounting for 10% of shipments last Q, measures an average of, rough guess, 65sqmm. Spitfire/Duron, 45% of shipments, measures about 100sqmm. Tbird/Athlon, also 45% of shipments, measures around 120sqmm.
Now, let us model the microprocessor products being sold by AMD in a year and a half. There will be no K6 family. The Athlon of the time will be the Tbred, and Burton will be somewhat imminent, probably. But I don't think SOI will significantly alter the die area, so it may even be the same. According to AMD, a "130nm Palomino" (which I interpret as meaning Tbred) will measure 80sqmm, which is 66.7% the size of the current Athlon. I'll just guess that the Morgan will also be like that, and I'll speculate it at 65sqmm. Then, we have the high end parts: Clawhammer will measure about 100sqmm, and we have no clue how large Sledge Hammer will be. Supposedly, it's a multicore chip, but the way things have been going I have my doubts about AMD getting to that stage on the first try. Let's just assume that it's large enough so that the average K8 processor has a 110sqmm die.
Another bit of total speculation, I will guess that the Duron of the time -- Morgan -- and the Athlon of the time -- Tbred -- will be equal in shipments, just like their counterparts are today. In addition, I'll guess that Hammer comprises 10% of shipments at the time.
So, current day is 120x0.45 + 100x0.45 + 65x0.1 = 105.5sqmm average die area.
Year and a half from now is 110x0.1 + 80x0.45 + 65x0.45 = average die measurement of 76.25sqmm
A drop from 105.5sqmm to 76.25sqmm will result in an increase of about 40% in terms of die per unit area. Compounded on top of the 9.36% boost in total area, we are brought to a total unit increase of 53.1%, far short of our +72.5% goal. I should note that I made an error in the above calculations -- they assume that Austin was shrunk to 130nm as well. I apologize for that. Just for reference, if the amount of capacity in Austin currently used for microprocessors stays that way, then area in a year and a half from now would actually increase by 100/79.1 = 26.4%. In conjunction with our DPUA estimate, we do under this case get a 77.0% increase in unit shipments, just enough to bring AMD to that 30% market share in a 15% unit growth year and perhaps a little more ahead of that. But making that change in the calculations assumes that AMD was lying when they told their investors and the media that Austin would shift towards non-PC components. And, well, if growth is greater than 15%, then all bets are off. The same model with 20% unit growth would leave AMD just a little short of their 30% market share goal.
But I'm tired now. Ranting takes a lot out of you. The basic idea is that AMD in no way is guaranteed an increase to 30% market share given their current public capacity plans. At best, they'll make it with the hair on their skin to spare, unless they're doing stuff we don't know about (like using foundries).
ZZzzzzz....
-JC |
