Carl, re: The controller sees the bus impedance, but the RDRAM chips, since they are on the middle of the bus, see half the bus impedance. But both driver types are designed for the same output drive strength. Controller outputs drive down the bus and are absorbed by the termination at the other end.
Since the bus is terminated, all chips see ZO/2 irrespective of position on the bus. The last chip on the bus certainly can't be characterized as being in the "middle of the bus."
What's somewhat unusual is that RDRAM drives are half strength (in terms of voltage) because of the half impedance that the part sees in the middle of the bus. Two output signals propagate from the RDRAM, one half goes directly to the termination resistors and is absorbed. The other half is reflected at the controller end of the bus, and then travels back down the bus and is absorbed by the termination resistor.
The voltage is doubled at the Controller since that end is un-terminated and hi- impedance.
Because of the above, each RDRAM must drive a signal onto a floating bus. For this reason, the output is constructed as a current source, instead of the more usual voltage source.
Floating bus? Explain that one, please. The bus is referenced to voltage, and through capacitors, to ground. If the bus were floating, wouldn't you expect severe issues of bias on the bus? As for using current source, the characteristics of the Rambus controlled impedance bus require it. And current source being very hi-impedance, it minimizes effects of reflections from the controller.
Because of the fact that RDRAM outputs have to drive into their own (or worse yet, other chips') reflected output signals, it is not possible to hook an oscilloscope up to the RDRAM output to see the "eye diagram". Instead, the eye diagram for RDRAM outputs is only valid at the controller pin. Eye diagrams for controller driven signals are valid at each RDRAM pin, of course.
Because the only place the "eye" is valid is at the controller pin, it makes no sense, (and is probably unintelligible), to look at an "eye" at the RDRAM output.
JMO's |
