Carranza, you constantly mix up many things
1. channel coding is NOT an error correction
(This is what Viterbi is famous for, just ask anyone
who understands both channel coding and error correction)
2. error correction is done by mechanisms outside
the air interface channel. (just as they are done
in all fullduplex systems I am aware, where there is
a return channel)
3. This error correction is the one repsonsible for
zero errors.
4. The channel coder is responsible for a low enough
error rate for the error correction protocol to be
efficient.
5. HSCDS includes all those channel coders and
corresponding circuit switched bit rates.
(just like cars inlude gears)
6. The error correction must be end-to-end to ensure
zero errors, not in here and there in the total
transmission path. (bit errors can occure outside
the air channel, in the interfaces to different
networks, backbones, even in things like windows drivers,
buffer over, under runs, lost data, etc,etc)
7. HSCDS was originally envisioned with all those
channel coders and even more
As you constantly mix these two things, channel coding
and error correction, your conclusions are also wrong.
In your "business case" for HSCDS you also constantly
disregard the most important factor, the multislot
capability, your third major error.
Ilmarinen
You are like a dog with two different bones and you do
not know which one you are talking about, although the
bones are totally different and one isn't even a bone.
Additionally you constantly forget that there are 8 times
more lanes on the road, of which 3-4-6 easily can be used,
especially to achieve high burst rates.
(you are maybe familiar with 2x64kbps ISDN with 64 or
128kbps speeds)
8. Just to be sure, for packet networks the issue of
error correction is slightly different, but not the
(basic) issue of channel coding, which is the same.
(I'm sure one can make some optimization of channel
coding to make it slightly better for packet transmission) |
