The manufacturer(ADI) says . . .
NORWOOD, MA (June 11, 2001) - Analog Devices, Inc., a global leader in high-performance semiconductors for signal processing applications, revealed the new Blackfin family of 16-bit digital signal processors (DSPs) and the world’s first product to integrate the high-performance Micro Signal Architecture jointly developed with Intel Corp. Designed for telecommunications and a range of Internet appliances, this new Blackfin DSP shortens software and hardware development time through a programmer-friendly architecture and on-chip interfaces to ADI’s world-leading data converters. To maximize the unique Dynamic Power Management features within the architecture, ADI also disclosed a companion power management chip that can precisely vary the voltage of the DSP. This unprecedented degree of control can reduce power consumption in Blackfin DSP-based designs by more than 60 percent.
"The Internet is driving a new era of signal processing technology to serve wireless, broadband, imaging, instrumentation and control applications," said Brian McAloon, group vice president for the DSP and System Products division at Analog Devices. "The Blackfin DSP architecture provides a foundation for the next generation of ADI general-purpose and application-specific DSP-based solutions for these applications."
The new Blackfin DSP operates at 300 MHz, delivering up to 600 million multiply accumulate instructions per second (MMACs) and power consumption as low as 42 milliwatts (mW) at 0.9 volts (V). The Blackfin DSP improves the performance of ADI’s DSP portfolio by more than four fold and reduces the power consumption by almost one third. The Blackfin DSP family will extend to devices delivering up to 1 GHz performance.
First Blackfin DSP Targets Video-Enabled Applications
The ADSP-21535 Blackfin DSP is a highly-integrated, high-performance solution for video-enabled Internet applications such as video telephones, gaming devices, web terminals, NetTVs, and smart handheld devices. To simplify system connectivity, this first DSP in the Blackfin DSP family includes Peripheral Component Interconnect (PCI) bus and Universal Serial Bus (USB) Device interfaces. USB is the de-facto standard for linking or docking portable devices with stationary equipment. The PCI transport is common in PC-controlled systems such as PBX telecommunications equipment, factory automation, robotics, medical instrumentation, computer printers and many different test and measurement applications. The first Blackfin DSP device integrates 2.4 megabits (Mbits) of SRAM (Static Random Access Memory) and a level one memory that can be configured as Cache or SRAM. The on-chip memory minimizes the off-chip accesses that slow processing and consume power. The DSP receives data from an analog-to-digital converter and transmits data to a digital-to-analog converter via four on-chip serial interface ports.
Video Optimizations
Enhanced media instructions process the bit stream for rich multimedia content at up to ten times the performance of other DSPs. With video arithmetic logic units (ALUs) processing up to four 8-bit math operations in a single clock cycle, software can efficiently support video compression, motion estimation and Huffman coding algorithms used by video and image processing standards such as MPEG2, MPEG4 and JPEG.
Dynamic Power Management
The ADSP-21535 Blackfin DSP is the first DSP with Dynamic Power Management, allowing independent adjustment of both voltage and frequency to minimize the energy consumed by each processing task. A power management companion chip from ADI manages the voltage and battery charging functions in Blackfin DSP-based designs. The power management solution is based on ADI's expertise in notebook PC core power management, using dynamic voltage control and ADOPT technology. Dynamic Power Management reduces power consumption using advanced clocking control, five core power down modes and independent power down states for each of the functional blocks within the DSP core, memory blocks and peripherals.
Signal Processing Architecture for the Internet Era
The Blackfin DSP architecture is optimized to process large streams of images, sounds, text and data in a wide range of emerging Internet applications. Its three primary features include: high performance at very low power consumption; optimizations to speed programming and debug; intrinsic support for video and wireless applications. The architecture combines a dual-MAC, 16-bit, fixed-point digital signal processor and the instruction set of a microcontroller into a single platform with a unified programming model. Programmable in C and C++, Blackfin DSPs efficiently run signal processing, user interface and control code. ADI’s award-winning VisualDSP++ Integrated Development Environment provides compiler, cycle-accurate simulator, debugger and code profiling tools.
Pricing and Availability
Software development tools and technical documentation are available now at www.analog.com/blackfin-dsp. Two Blackfin DSP models are scheduled for September 2001 sampling and first quarter 2002 production. The ADSP-21535PKCA-200, operating at 200 MHz, has a suggested resale price of $27 per unit in quantities of 10,000 units. The ADSP-21535PKCA-300, operating at 300 MHz, is priced at $34 per unit in quantities of 10,000 units
Chipcenter's Paul Schreier says . . .
Late last year, Analog Devices and Intel announced joint development of a new core configuration: Micro Signal Architecture (MSA). Its name points out that the scheme combines features of microcontrollers and signal processors, a combination becoming increasingly important and popular in chips that run Internet appliances. In what’s likely the major announcement of the year for Analog Devices on the DSP front, that firm is describing the first standard product based on that core. Further, that device opens the door to a whole new family of future devices collectively known as Blackfin DSPs.
Note that while Intel has yet to announce a specific part based on the MSA, in April, at the Tokyo edition of the Intel Developer Forum, the firm demonstrated working silicon of a device based on MSA. The firm said that the prototype device will be part of an integrated baseband chipset for cell phones and other handheld devices, a chipset being formally announced later this year. In more general terms, MSA is a key building block for the Intel Personal Internet Client Architecture (Intel PCA), which that firm says is ideal for processing audio, video, image and voice in next-generation wireless Internet devices.
Terminology
Before it was formally announced, the Micro Signal Architecture had the internal project name Frio. The name Blackfin refers to the commercialization of that technology at Analog Devices, whereas it appears that Intel will refer to devices based on the core as belonging to Intel PCA.
Technology
The technology is a 16-bit fixed point core with two MACs, two 32/40-bit ALUs and four 8-bit video ALUs. In fact, explains ADI product marketing manager Ken Waurin, if you were to remove the 8-bit video ALUs and slice the device in half, you’d essentially have the ADSP-219X, which has been ADI’s performance leader in the 16-bit space until now. However, this device not only doubles the resources, it runs at twice the speed (at rates to 300 MHz today) and so brings a performance improvement of 4X. Even with that underlying similarity, though, recognize that this design was entirely new from the ground up, adding lots of peripheral goodies and memory capability, so don’t count on any code compatibility with previous devices.
ADI’s Sharc and TigerSharc devices, at 32 bits, are targeted at the infrastructure end of the Internet world. These new Blackfin devices, in contrast, come with features that make them attractive at the end-user side such as appliances, cameras, cable modems, desktop boxes, phones and so on. Specifically, such products demand low power consumption to allow for battery operation, they often must interface to a variety of peripherals or external devices; and they often need the features of a microcontroller (to handle the user interface, keypad, display) while a DSP crunches the audio and video data associated with Internet applications.
Indeed, this mixture of microcontrollers and DSPs is all the rage in the marketplace right now, and ADI appears to have taken the lead when it comes to tightly integrating those requirements along with development environment in one device suitable for a broad range of applications. The architecture allows the device to process 8-, 16- and 32-bit data words natively. Further, the Blackfin DSP architecture supports multilength instructions; the core can intermix and link 16-bit control instructions with 32-bit DSP instructions into 64-bit groups to maximize memory packing. You can also take advantage of built-in video instructions. For example the DCT is supported with an IEEE-1180 rounding operation; the Sum Absolute Differences instruction works with motion-estimation algorithms; for Huffman coding the instruction set supplies the Field Deposit/Extract command.
Devices
So let’s now go beyond the core technology and introduce the first standard device: the ADSP-21535 (Blackfin DSPs will fall into the numbering scheme as 215XX devices). Highlights include a 300-MHz 16-bit fixed point core, onchip memory configured as260k bytes of dual-ported SRAM (popular for DSP applications) and 48k bytes of data cache (popular for controller configurations), a 2.4G-byte/sec I/O bandwidth over a 32-bit external bus to handle the intense I/O requirements of audio and video on Internet appliances and systems, PCI-bus and USB support plus dynamic power management
In regard to this latter item, the developers are proud of the fact that you can vary both frequency and supply voltage to reduce consumption. The core today runs at voltages from 0.9V to 1.5V, although the device roadmap refers to levels as low as 0.7V. Speeds today range from 100 MHz to 300 MHz, and here the roadmap makes mention of devices at 1 GHz. To achieve today’s top speed of 300 MHz you must run the device at 1.5V, and here total consumption equals 350 mW; dropping the supply voltage to 1V limits peak speed to 150 MHz, and here the chip draws a miserly 80 mw The minimum frequency at which you can run the device at the lowest voltage (0.9V) hasn’t yet been characterized, so the lowest possible consumption level isn’t yet spec’d out.
System designers should also be interested in an associated chip under development at ADI. It’s a variable-output voltage regulator optimized for the ranges needed with this device. An algorithm detects when the system needs less horsepower and then commands the regulator to drop to a lower power-saving level temporarily; when requirements pick up, so does the voltage level and the available horsepower. This all happens dynamically and programmatically.
Another key aspect consists of options for attaching A/D converters, which are also key components in Internet appliances. For peak performance, explains Waurin, you’d want to put a high-speed parallel A/D directly on the system bus, and here the limiting factor would likely be the speed of the converter rather than anything on the Blackfin. Other options include working with the two industry-standard SPI ports as well as two SPORTS (synchronous serial ports, a design proprietary to ADI but similar in concept to serial schemes you’ll find in competitive device families).
From an architectural standpoint, ADI sees the TI TMS320C5510 as the closest competitor on the DSP front (the 5510 also offers dual Macs and ALUs but has no video ALUs). One key difference is code address space: the 5510 handles 16M bytes of address space, whereas the designers at ADI believe that to handle tomorrow’s video-intensive applications you’ll need considerably more addressing range -- this first Blackfin design works with as much as 768M bytes of address space.
Of course, you need a powerful development environment to help you take advantage of all these features. ADI’s well-known Visual DSP started supporting the core early this year, and today it fully supports the 21535, so you can start development using that environment’s device simulator. One feature of interest is a statistical profiler that helps you identify where to emphasize programming efforts.
The result is in terms of microcontroller code space, ADI believes that the 21535 typically comes in at about the same size as the ARM Thumb core, which people often regard has having good code size. In the DSP space, ADI believes that the Blackfin is 40% lower than TI’s C5510 based when comparing compiled code, and the assembly level DSP kernels require anywhere from 20% to 80% fewer cycles.
The ADSP-21535 is touted as a general-purpose device. It will ship initially in two speed grades: 200 MHz ($27, 10k pieces) or 300 MHz ($34, 10k pieces). Samples should be available this coming September with volume production slated for 1Q02. Later members in the family are expected to pick up accelerators and other function blocks targeted at specific niche markets. Among major targets where you can look for Blackfin DSPs are in media products (digital still cameras, camcorders), wireless devices and broadband appliances.
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