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To: Ali Chen who wrote (24904)6/18/1997 1:37:00 AM
From: Paul Engel   of 186894
 
Ali - Re: "If today the K6 performance is on-par with P2 clock-to-clock),.."

Hypothetical situations are not what I waste my time on. Since the K6 is NOT on-PAR with a P2, I won't waste my time.

Now - back to system performance -Did you ever wonder how L1 and L2 caches get filled? Generally, main memory is accessed and the results are written in to the caches. The exceptions are results generated by the CPU which are first stored in the caches - assuming write-back caches are used.

As you noted, the P2 can implement a write-back at a convenient time when main memory is not being accessed. However, for large numbers of write-back cycles, the speed at which these can occur will be a rate limiting step. Hence - FASTER MAIN MEMORY will produce faster system response.

Thus, system performance will again be optimized by the fastest accesses to Main Memory.

To elucidate this concept - which you clearly seem incapable of understanding - why not use REAL SLOW MAIN MEMORY DEVICES! These are real cheap - and, according to you, will not impact system performance. Don't you see the fallacy in this?

Paul
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