Re: If the CPU is bursting data to a network controller, that means the PCI bus is being occupied by the NIC
Sorry, not the best example. On an AMD system, if one CPU is writing to (or reading from) memory, the other CPU can be reading from memory, NIC, Disk controller, etc. Or, even with only a single CPU, there could be a concurrent DMA transfer between peripheral and memory while the CPU is is updating a different region in memory (there will be cases where there is contention for the same pages, but usually not).
The FIFO buffers on each of the point-to-point busses will also allow for better utilization of the memory, I/O, and AGP busses. They act in a way that is similar to prefetch in a processor.
The benefits are limited with a single DDR 2100 channel, but will scale nicely with DDR 2400, DDR 3200, etc. while P4 hits a wall with its single bus.
Obviously, Athlon's bus will also take much more advantage of any dual channel configuration than P4's, too.
Dan |
