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Technology Stocks : Advanced Micro Devices - Moderated (AMD)

AMD 214.90

-0.1%

Dec 26 3:59 PM EST

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To: Tenchusatsu who wrote (52699)	8/28/2001 12:01:22 PM
From: Saturn V	Read Replies (2) of 275872

Ref < Dan 3 and... the only rule-of-thumb that comes even close is the one which governs the relative sizes of two-level caches (4:1 ratio).> The rule of thumb is that L2 must be at least 4X L1, and L3 must at least 4x the size of L2. The miss rate of the cache is highly bench mark specific. However a "general rule of thumb " is that averaged over all benchmarks, the cache miss rate falls inversely as the square root of the cache size. Thus a doubling of cache size will lower the cache miss rate by 30%. Thus the miss rate has a law of diminishing marginal returns wrt to cache size. Dan3 has obviously stretched this fact to suit his view of the world. I concur with Elmer that a L3 does not makes sense. The difference in the speed of L2 and L3 is not enough to warrant a new level of cache, and it makes sense to increase L2 only. And I do not know why Merced used a L3.

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