Tench,
Ref- Jackson Technology.
The Jackson technology is very interesting. It reminds me of IBM's dual processor on a chip, which was announced two years ago. This is two separate and complete CPU on a chip, but with a common L2. AMD's paper Sledgehammer sound very similar to the IBM approach.
The Intel Jackson technology differs in using fewer transistors than the above two approaches, and appears more efficient. For example there is a common set of ALUs and FPUs shared between both threads. However they obviously have independent register sets( integer register file, floating point register file,program counters,flag registers and instruction registers). Does not each thread need an independent instruction decode, and instruction pipeline ?
Are you in a position to comment about the implementation of Jackson ?
The Jackson Technology and other multi threaded chips, benefit only those applications which been coded for multiple threads, and have small data set compared to the L2 size. If the L2 is small, each thread can cause eviction of the data needed by the other thread, leading to cash thrashing. So Intel is wisely first implementing it on large cache Xeons.
The trend to multi threaded processors is inevitable because the CPU clock speed is continuing to outrun memory speed. This is causing cache sizes to explode. Even then cache misses are inevitable. So the second thread automatically starts executing when the other thread is stalled. |
