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Technology Stocks : Advanced Micro Devices - Moderated (AMD)
AMD 203.17-0.7%Jan 9 4:00 PM EST
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To: Joe NYC who wrote (52829)8/28/2001 5:46:33 PM
From: ElmerRead Replies (2) of 275872
 
I think there is an important feature of the L2 that has been only briefly touched on and that is multiplier. With multiplier of 20, each L2 miss will stall the CPU for 20 x the RAM latency CPU cycles, which in case of 10 bus cycle latency would be 200 CPU cycles. As the multiplier increases, so does the damaging effect of an L2 miss on the overall performance of the CPU.

Good points.

I wonder how L2 size and memory latency will be looked at in light of Intel's new Jackson Technology announcement? The ability to switch to a different thread with no dead clocks will really change the equations. Latency is less of a penalty and bandwidth more of a benefit. That spells RamBus.

EP
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