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Technology Stocks : Advanced Micro Devices - Moderated (AMD)
AMD 214.990.0%Dec 26 9:30 AM EST
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To: peter_luc who wrote (56989)10/3/2001 5:43:23 AM
From: pgerassiRead Replies (1) of 275872
 
Dear Peter_luc:

It looks interesting. A minor jab that the upper level 1 cache is an instruction cache not as the labeled data cache. Many things are done to reduce the amount of instructions needed to be processed like hidden surface removal does for 3D acceleration and fill rate requirements. Some things like the do both ways increase the number of instructions to do. The latter could be a concern because most CPUs now are heat limited (current CPUs run faster if the rate of heat removal can be increased). Too many unnecessary operations could increase heat output with little increase, no increase or even some decrease of performance. If this core is either sampling or near sampling, Intel's Northwood may not be relevant anymore. Itanium and McKinley could go the way of the i860 or other mainstream VLIW CPUs, simply being ignored or dropped quietly.

Matter of fact some software timing loops may be completely eliminated by this core as the operations are compressed away (a better timing loop could be made that refuses to be eliminated unlike traditional do nothing loops).

It will be interesting how much faster per clock this Clawhammer could be than a Palomino.

Pete
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