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Technology Stocks : Advanced Micro Devices - Moderated (AMD)
AMD 214.18-0.5%Dec 31 3:59 PM EST
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To: Joe NYC who wrote (59089)10/18/2001 10:05:14 AM
From: combjellyRead Replies (1) of 275872
 
"and I don't know if it is possible to have onchip memory controllse plus off-chip L3"

Hard to say how you would do that. But, AMD doesn't have to go off-chip for an L3. Here, eet.com a Swiss team has developed a SOI DRAM cell that eliminates the capacitor by using the "floating body effect". With read and write times of less than 3ns it is fairly fast, and the size is pretty small, 0.04 square microns on 100nm, maybe 0.1 square microns at 130nm? So even with the extra ciruitry to make it work and the wiring to connect everything, an OEM should be able to shoe horn in 512k bytes into 1mm^2. So an on-chip 4 meg. L3 cache in less than 10mm^2 should be worth it.
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