Kapkan, Re: "Now that you asked around and found out the truth, you say its irrelevant. Before you said that I was spreading FUD."
That's right. By suggesting a slower clock as running a vital part of the chip, you were casting fear about Intel's ability to rate the chip by it's "normal" clock. By making these assertions without proof, you cast uncertainty among those on this forum that don't know as much about CPU design. By claiming that the decode logic was running at half the processor speed, and thus creating an obvious bottleneck, you were meaning to cast doubt about the micro-architecture design. Fear, Uncertainty, Doubt - you had all three of them, and that's FUD.
Re: "That was the whole idea behind the TC - keep the decode logic largely unchanged from the good old P6, but make the rest of the Willy downstream run twice as fast."
That is part of the idea. Any reuse of the machine code makes the design process shorter, and easier. The P6 decoder was already very well optimized, and very powerful. But it's only a small part of the Pentium 4, since the idea is to have uops available in the trace cache most of the time, to minimize longer trips to the decoder.
wanna_bmw |
