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Technology Stocks : Advanced Micro Devices - Moderated (AMD)

AMD 203.14

-0.8%

Jan 9 3:59 PM EST

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To: combjelly who wrote (62576)	11/7/2001 1:05:30 PM
From: wanna_bmw	Read Replies (1) of 275872

Combjelly, Re: "It would also depend on what the desired bin splits are and a whole pot of other factors. But, there is some ballpark figure for what is expected given a particular die size." I agree about the "whole pot of other factors" part, but there's no reason to assume you can get a ballpark figure using outdated defect analysis models. Nobody knows how good Intel's yield is, but hints from others on this forum indicate that it is quite good. Re: "Assuming that Itanium is 300mm^2 or so, that is a maximum of around 100 die per wafer on an 8 inch wafer. Now there is no way that it will map to cover 100% of the wafer surface, so what? 75 max? And we haven't even begun to estimate the costs of those L3 cache chips..." Fine. Let's assume that there are 50 good die on a wafer, then. If that wafer costs $2000, then each die cost about $40. Add probably $60 for the L3 cache chips (which I'm sure Intel gets at commodity pricing levels) and we'll give the rest of the generous cost estimate to packaging. Even if the packaging costs another $100 per processor, that equals the $200 costs that I estimated before. Whattuya know? wanna_bmw

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