| Wanna_bmx, ok, I guess I made a mistake here. Let's focus specifically on the SRAM. Yeah, you did make mention of the speed issue, but it was only to wave your hands to dismiss it. You have no basis to do that. The L3 cache SRAMs are designed specifically for Itanium, there aren't used anywhere else. I believe they are made by Intel, since they made their own for the PPro, PII and Xeons. This is a tricky business, it may have been the case that the speed of the L3 cache was the reason there were so many 600MHz Itaniums at the beginning. Regardless, in the greater scheme of things, Intel has not made very many of these things. As a result, they really haven't had a chance to optimize the process for this product, and they are going to have a higher number of units that bin out at speeds that aren't useful. At ~$2k per wafer, this can add up. These are some of the reasons why loww volume pushes up unit cost, even for a company skilled in that particular area, as Intel is. Trying to compare something like the L3 cache of an Itanium to a merchant chip running at a significantly lower speed is not very helpful. Sure, there are only a few tenths of a nanosecond difference in speed, but those tenths of a nanosecond are very difficult to get. There is a reason that most of the very fast SRAMs top out in the 400-500MHz range. |
