wbmw,
Server apps also favor memory and I/O bandwidth
I have not looked at any of the Itanium chipsets, but in systems with traditional external Northbridge, isn't there only 1 path to the CPU from the chipset to the CPU, through which memory is accessed, or potentially direct I/O is sent, meaning that I/O bandwidth which you mentioned is actually irrelevant to the CPU, but a function of the chipset.
So we are down to the memory bandwidth, which is not bad for Itanium, but hardly a reason to start a new computer architecture.
high memory and I/O bandwidths imply that the system can scale in performance better with multiple CPUs.
Well, assuming the first part of the my argument is correct, and memory and I/O bandwidth (from the point of view of the CPU) are the same thing, I am not quite sure what all of this has to do with performance scaling and the CPU. I think again, this is a function of the chipsets.
It seems that the chipsets for Itanium CPUs will be very sophisticated, and will probably perform well. The chipsets IMO will save Itanium CPU from total embarrassment of being a totally useless CPU (in its current form), by offering some functionality that other systems don't offer.
Joe |
