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Technology Stocks : Advanced Micro Devices - Moderated (AMD)
AMD 231.94+0.1%3:59 PM EST
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To: Pravin Kamdar who wrote (64122)11/20/2001 2:31:38 PM
From: tcmayRead Replies (4) of 275872
 
"I'm not a memory designer, but I seem to remember from way back in my college days that SRAM must be refreshed every few milliseconds due to charge decay on the caps storing the positive memory bits. It seems that it would follow that leaky transistors would lead to higher refresh rates and higher current, and hence power, drain."

You are confusing DRAMs with SRAMs. Dynamic RAMs store a 1 or 0 on the storage cell capacitors (and not necessarily a "positive memory bit"--a full vs. empty well can be either a 1 or a 0, and may vary from one part of the array to another).

Static RAM consists of cross-coupled inverters, thus "locking" the cell into one of two positions, interpreted by the logic of the memory as a 1 or a 0.

Leakage currents affect various things. The claim that Intel's Mobile .13 processors are leaking 17 A at 1.3 volts is not supported. Such a leakage in sleep mode would imply the processor alone is disspating roughly 22 W.

The spec sheet I saw said 1.7 A, which is more plausible.

As to "problems" with noise, this would be mere speculation. Designers characterize such things all the time.

(Too bad you manibanners expelled Paul from your sandbox.)

--Tim May
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