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Technology Stocks : Intel Corporation (INTC)

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To: Robert Salasidis who wrote (149004)	11/20/2001 8:20:48 PM
From: Ali Chen	Read Replies (1) of 186894

Listen up. I do not care what your tweaked "mobile" design is doing at voltages below level of functionality ("deeper" sleeps), or what the discrepancy is between "maximum" and "typical" power. There is a specification for the most recent Intel's desktop CPU, file 24965702.pdf of August 2001, from developer.intel.com where the sleep-nosleep data were taken apparently at identical conditions (since there are no "deeper" modes). It says in Table 7, page 25: leakage = 10.2A, Iccmax = 20.5A. Period. It is 50%. Period. It is huge. You and Paul are trying to steer the discussion into different direction, to mask the real problem. I am not questioning ability of Intel's mobile CPU to consume little power in "deeper" sleep mode. What I am asserting is that at normal operating conditions Intel's current 0.13u transistors are experiencing horrible leakage, which is manifested by consuming 50% of the total run-time core current. The power consumption is not the main issue here, only the tool to unfold the problem. And the problem is that the excessive leakage diminishes all returns from speed improvements that should came from shrinking transistor geometries. If you have 50% leakage at 0.13u, how can you hope to get anything better at 0.09u? Just curious. - Ali P.S."The numbers also put the sleep current in line (or less per transistor) with the Athlon parts (running on a 0.18 process)." In line? Are you nuts? In line with what? Top Intel mobile sleepy design at 1GHz and 0.13u process, with 1.5GHz 0.18 power desktop CPU? If this is "in line", I rest my case.

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