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Technology Stocks : Advanced Micro Devices - Moderated (AMD)

AMD 210.78

-4.8%

Dec 12 9:30 AM EST

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To: Petz who wrote (64214)	11/21/2001 3:35:26 PM
From: jcholewa	Read Replies (2) of 275872

> Maybe even less significant, like interleaved DDR. QBM (or, at least, what they describe there for the VIA chipset) is very neat, but it's no more neat than the nForce's 128-bit memory interface or the theoretical Hammer 128-bit PC2700 low latency interface. However, the chipset to cpu peak bandwidth needs to be in the ballpark of the chipset to memory peak bandwidth in order for performance to be realized. So a P4 with a 4.2GB/s memory bus will have a peak bandwidth from memory to cpu of 3.2GB/s while an Athlon with a 4.2GB/s memory bus will have a peak bandwidth from memory to cpu of 2.1GB/s (2.7GB/s as of mid-02).

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