Advanced Micro Devices - Moderated (AMD) Message Board

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Technology Stocks : Advanced Micro Devices - Moderated (AMD)

AMD 210.78

-4.8%

Dec 12 9:30 AM EST

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To: jcholewa who wrote (64227)	11/21/2001 4:10:51 PM
From: kapkan4u	Read Replies (1) of 275872

Here is a confirmation from Paul DeMone that the P4's front-end (decoder and trace cache) are operating at 1/2 the nominal clock: realworldtech.com "The P4 front end can decode one native x86 instruction per clock cycle each of which may yield one or more uOPs. This is not a bottleneck because these uOPs are retained in the trace cache for re-use. Most program execution time occurs in loops when the P4 executes uOPs fetched directly from the trace cache. The x86 decoder is only used during trace cache misses. The trace cache operates at 1/2 the main clock rate and fetches 6 uOPs at a time. On balance the P4 was designed to fetch, execute, and retire uOPs at a peak rate of 3 per cycle."

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