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Technology Stocks : Advanced Micro Devices - Moderated (AMD)
AMD 210.78-4.8%Dec 12 9:30 AM EST

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To: kapkan4u who wrote (64232)11/21/2001 4:19:56 PM
From: jcholewaRead Replies (1) of 275872
 
> Here is a confirmation from Paul DeMone that the P4's
> front-end (decoder and trace cache) are operating at 1/2
> the nominal clock:

We already knew that the trace cache issued 6 ops every 2 cycles (I wasn't sure that it was explicitly halfly clocked). But I do not see him saying that the decoder is clocked as such.

Additionally, I find myself surprised to disagree with him when he says that the decoder is only used during trace cache misses. If it wasn't, then how does the trace cache fill up in the first place?? I mean, if the decoder was inactive when the trace cache is going, then for every cycle that the trace cache hits, there would be a handful of cycles where the trace cache *must* miss because it's totally empty (because the decoder feeds the TC)!

-JC
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