Advanced Micro Devices - Moderated (AMD) Message Board

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Technology Stocks : Advanced Micro Devices - Moderated (AMD)

AMD 221.39

-0.1%

3:59 PM EST

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To: Ali Chen who wrote (64270)	11/23/2001 9:49:58 PM
From: kapkan4u	Read Replies (1) of 275872

<It says that 0.18um (100nm Leff) technology produces SRAM that operates at barely 1GHz. How come P4 can have "full speed" caches if it is technologically impossible to run 0.18 SRAM at 2GHz> Yes, 1.06GHz without a guard band. This is why 2GHz is the hard limit on 180nm. If you follow Intel Development Forum link at chip-architect.com and look at the P4 die, you will see a huge area of the chip, almost 50%, is very likely running at 1GHz on a 2GHz P4. The half clocked parts of the chip most likely include from left to right, top down on the die: 1. FSB logic. 2. 256KB Unified L2. 3. Front-end branch prediction. 4. Instruction decoder. 5. Trace Cache branch prediction 6. Trace Cache. It is even possible that the Floating-Point and MMX/SSE/SS2 unit is half clocked. If the FP unit is half clocked, then it would bring the half clocked die size to around 70% of the chip. I think that this is a bomb that is waiting to explode in Intel's face in both PR and leagal sence. Can you imagine if Class Action lawyers get a hold of this? Kap

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