Barry, Re: "Other chipmakers, such as International Business Machines Corp. (NYSE:IBM - news) are already using what are known as partially depleted substrate transistors, but they were not designed to address what is known as off-state leakage, or the passage of electrons from the source to the drain when no power is supplied to the gate, Hutchinson, the VLSI analyst, said. Intel said this type of transistor results in 100 times lower leakage than traditional silicon-on-insulator implementations."
The AMDroids should take note: IBM's SOI process will eventually be prone to larger levels of leakage. Only by going to fully depleted substrates will some of the adverse effects of SOI be lightened. IBM doesn't have this research handy, AMD doesn't either. Intel does. Intel also has high-K dialectrics to stop leakage further in the future.
Super-speedy transistors showcased in the last year have gate dialectrics only about three atomic layers thick, meaning that increasing numbers of electrons are leaking through, and this leakage has become one of the largest sources of chips' power consumption.
Intel said that this new material reduces gate leakage by more than 10,000 times compared to silicon dioxide. The combination of these two developments will result in chips that have higher performance, produce less heat and allow for significantly longer battery life.
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