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Technology Stocks : Intel Corporation (INTC)

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Jan 9 9:30 AM EST

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To: Raymond Thomas who started this subject	11/30/2001 12:52:44 PM
From: wanna_bmw	Read Replies (1) of 186894

Anand interview with VIA - talks about Hammer anandtech.com Anand does an interview with Richard Brown from VIA. Among some of the interesting things here are Browns feelings about AMD's Hammer. "As I indicated in my answer to the previous question, the AMD Hammer processor with a local DRAM controller will definitely deliver significant performance benefits in a multiprocessor system. But if you look at the history of the PC industry, DRAM speed enhancements occur more times within a given CPU generation than CPU interface enhancements. Therefore, for a CPU-Memory cluster server multiprocessor system, you will need to make a trade-off between the memory size/locality and the memory speed. For the Hammer architecture, such a trade off will definitely be worth it. For high performance desktops, on the other hand, memory speed and access latency from components other than the CPU are also critical to the performance of the system - just as the VIA Apollo KT266A has demonstrated. A Hammer CPU with local DRAM may not be the best choice for this type of application. With the AGP card for example, it would probably be necessary to increase its onboard memory in order to reduce the dependence on the Hammer CPU's HT bus. For an integrated SMA chipset, it would be unavoidable for the chipset to have a DRAM interface that could serve as a display frame buffer or system memory. So the way we see things, there will be no single "one size fits all" chipset solution for the Hammer processor. There are a lot of factors that will need to be carefully considered in developing chipsets for each particular market segment. One thing's for sure, however: VIA will have the first cost effective and high performance volume Hammer chipset and will be the validation partner with AMD. VIA will continue to provide the highest speed DRAM controller as a building block of the VIA VMAP architecture. We will provide multiple levels of chipset integration and cost/performance to enable Hammer for different market segments." wbmw

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