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Technology Stocks : Intel Corporation (INTC)
INTC 36.15-0.6%Dec 24 12:59 PM EST
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To: Joe NYC who wrote (151244)12/5/2001 7:18:18 PM
From: Timothy Liu  Read Replies (1) of 186894
 
Joe,

Pardon my ignorance on the trace cache, and stubbornness:

Here is another one from sandpile.org. On L2 speed and decoder. I would think they mean 'core clock' cycle in this case. The document seems to be pretty updated since it include the 2G P4.

sandpile.org

...
L1 Cache Speed 1.0x Core Speed
L2 Cache Speed 1.0x Core Speed
External Bus Speed 100 MHz Quad-Pumped AGTL+ with VTT = VCC
Core/Bus Ratio 13.0x, 14.0x, ..., 20.0x

...
Instruction Decode 1x IA-32/Cycle
Instruction Dispatch 6x µOPs/Cycle
3x µOPs/Cycle Limit imposed by Trace Cache
...

My 0.02$
Tim
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