Dan, Re: "Try this, assume normal yields of about 145 DPW and explain to us how Intel only produced 27 million (or fewer) processors per quarter from 7 fabs with 60,000 WSPW capacity. It works out to about 14,000 WSPW to produce 27 million units. This isn't even 2 fabs worth. Intel says they have good yields and they were capacity constrained. What happened to 75% of their wafer starts?"
Assumption #1: Intel averages 145DPW.
Why do you assume this? What about the large die of the Pentium 4? Intel sold 6.5M of these last quarter, which is almost 25% if your assumption of 27M die is correct. Coppermine, which includes most of Intel's Celeron line, their Pentium III Xeon (small cache) line, and about half of their mobile line, is 90-100mm^2 (Celeron is the same size as Coppermine). Cascades, the large cache Pentium III Xeon, and Merced, the Itanium, both have to be above 300mm^2 in size. And Pentium 4 is about 220mm^2. 145DPW seems too high to me.
Assumption #2: Intel produced 27M die.
I don't believe you have this number. All you can do is subtract AMD's share from Dataquest's estimates. Maybe Intel produced 29M CPUs, and Dataquest didn't account for 2M. Maybe Intel produced 31M.
Assumption #3: Intel is producing 60,000 WSPW.
This is utter craziness. 3 of Intel's 7 fabs are ramping up .13u, so they probably ship less than 2,000 WSPW each. And, last quarter, one of these fabs had just gone online, so wafer starts from this fab wouldn't have been finished in the quarter. Intel's remaining 4 fabs probably range from 5,000 to 10,000 WSPW, but much of this is transitioning to non-CPU space, such as Intel's i845, which is .18u. I bet the amount of room in Intel's 4 .18u fabs committed to CPUs is less than 5,000 WSPW each. If we take the upper bound of these, and assume 2,000 WSPW from Intel's 2 .13u fabs from last quarter, we get 24,000 WSPW.
If we take 24,000 WSPW and figure in a loss of 15% of these (through line yield), we get about 20,400 good WSPW. If we multiply 20,400 good WSPW with 120 good DPW and 13 weeks per quarter, we get an output of almost 32M CPUs. Of course, that seems high, so I'm probably off, but that's my WAG on some of the numbers. Makes a whole lot more sense than your Dan3 twisted logic.
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