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Technology Stocks : Advanced Micro Devices - Moderated (AMD)
AMD 215.27+0.1%12:18 PM EST
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To: kapkan4u who wrote (65212)12/8/2001 2:45:36 AM
From: Joe NYCRead Replies (3) of 275872
 
Kap,

One problem I see with this is that if you assume that somehow the decoder is full speed, and can decode 1 istruction per clock cycle and generate 4uops per clock cycle, while the trace cache can feed (= accept?) 6 uops every other cycle, or 3 per cycle. I think the best instruction would be one that is decoded to no more than 3 uops.

Joe
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