Thanks for your post.
So, AMD has;
SDC - 46,000 sq. ft. (development FAB)
FAB 25 - 120,000 sq. ft. [.18] moving to flash
FAB 30 - being expanded from 90,000 to 120,000 sq. ft. [.18/.13]
FASL 1 - 70,000 sq. ft. flash
FASL 2 - 114,000 sq. ft. flash
FASL 3 - planned flash
FASL produces 150% [more recently, 125%] of the flash volume that Intel produces. AMD and Fujitsu each sell parts from the joint venture, and each has about 2/3 the market share of Intel in flash. So Intel needs about 150,000 sq. ft. of FAB space to produce flash.
Intel FABs:
So, we have
D1BR - 200,000 sq. ft. (once development, now production)
D1C - 135,000 sq. ft. [.13 -> .10]
D1D - 175,000 sq. ft. (not built out)
D2 - 36,000 sq. ft. in 1991 [.18/.13] flash
RP1 - 56,000 sq. ft.
FAB1 - closed?
FAB2 - closed?
FAB4 - replaced on site, probably D1D
FAB5 - closed?
FAB6 - closed?
FAB7 - 435,000 sq. ft. closing next year [.35] flash
FAB8 - ? [.35 and above]
FAB9 - Closed? flash
FAB10 - 90,000 sq. ft.? [.25/.18]
FAB11 - 120,000 sq. ft.? [.18 -> .13] flash
FAB11x - 135,000 sq. ft. [.13]
FAB12 - 135,000 sq. ft. [.18]
FAB14 - 90,000 sq. ft. [.25/.18]
FAB15 - 120,000? [.35/25] -> [.18/.13] flash
FAB16 - On Hold
FAB17 - 95,000 sq. ft. [.13]
FAB18 - 80,000 sq. ft. [.18]
FAB20 - 120,000? [.13]
FAB23 - 120,000 sq. ft. [.18] flash
FAB22 - 133,000 sq. ft. [.13]
FAB24 - 135,000 sq. ft. - on hold?
I excluded D1D, RP1, FAB7, FAB8, and FAB24 as either not built out, soon to close, or using chipset size technology (larger than .18)
I'd estimate Intel at about 1,200,000 Sq. ft. for CPUs/logic + FAB8. Many of the FABs are under construction (as at AMD), but I've excluded the 435,000 sq. ft. at FAB7 that will run until replaced by new space next year,
and 288,000 sq. ft. for flash.
I'll guess AMD's CPU space as 160,000 to 180,000 sq. ft of the 240,000 CPU/logic available with the rest being used for network chips, embedded processors, foundry space or under construction.
I'll guess Intel's CPU space in use as 600,000 to 800,000 sq. ft. of the 1,200,000 CPU/logic available, with the rest as above. |
