SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : Advanced Micro Devices - Moderated (AMD)
AMD 213.50+6.2%Dec 19 3:59 PM EST

 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext  
To: Bill Jackson who wrote (69004)1/26/2002 4:00:21 PM
From: pgerassiRead Replies (1) of 275872
 
Dear Bill:

From other discussions on this thread, the original and from other sources, what you want is called a "Hot Lot" or "Rocket Lot" depending on who you talk to. These can be done in 3 to 4 weeks from bare wafer to packaged die assuming SOI does not require any more time than a bulk silicon wafer would. Production starts almost after the time it takes to get a wafer through the 13 week normal speed process because its hard to ramp and determine bin splits from the "Hot" lots to what happens during normal production (this may be what happened to the 0.18u P3-1.13 and early "we will bury you" Coppermine 1GHz releases). Usually the production runs have a higher mean and peak speed and the yield is higher than the Hot runs but, you can't count on it as the Hot lot is babied (TLCed) through the steps.

Anybody else with better info?

Pete
Report TOU ViolationShare This Post
 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext