Intel Corporation (INTC) Message Board

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Technology Stocks : Intel Corporation (INTC)

INTC 43.48

+8.6%

Dec 2 3:59 PM EST

Public Reply Prvt Reply Mark as Last Read File

Previous 10 Next 10 Previous Next

To: Tenchusatsu who wrote (158348)	2/11/2002 3:08:10 PM
From: Ali Chen	Read Replies (1) of 186894

"Get real. Bugs happen. FIB workarounds are faster than waiting for a new stepping of silicon. But if FIBs become more impractical as features continue to shrink, that could spell major headaches for post-silicon validation." I am very real<g>. Yes, FIBbing is faster and MUCH CHEAPER then even a "late mask fix", not speaking of a new silicon spin. However, a necessity to verify a bug fix with physical fibbing in an indication of either sucky verification suite, or mistrusted back annotation and timing tool. It is a form of torture to force people to debug on silicon, with uncontrolled pattern inputs, heat issues and about zero visibility, as compared to fully-accessible design/verification environment. With designs piling up 100M transistors on a 10x10mm area, the only way to succeed is to master a trusted design/verification software set of tools. IMO of course. - Ali

Report TOU Violation

Share This Post

Public Reply Prvt Reply Mark as Last Read File

Previous 10 Next 10 Previous Next