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Technology Stocks : Advanced Micro Devices - Moderated (AMD)
AMD 211.88+2.8%10:54 AM EST
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To: wanna_bmw who wrote (73249)3/4/2002 6:46:48 PM
From: Ali ChenRead Replies (2) of 275872
 
"Sorry, but you're incorrect. I heard it from the horse's mouth. L2 Cache runs at full processor speed.
Of course it may totally blow your mind, but I thought I'd also mention that L1 data cache happens to run at 2x the processor speed (or 4.4GHz)."

If you don't understand the difference between clocking
of an SRAM cell and the rate of data multiplexing at an
interface point, I feel sorry for you.

You should read the _MARKETING BRIEF_ more carefully:

"Data clocked into and out of the cache every clock cycle"
and
"The Advanced Transfer Cache consists of a 256-bit (32-byte) interface that transfers data on each core clock."

Please note hints: "interface", "into and out of".
It speaks nada about internal design of the cache.
Try to comprehend the Rambus example too.

- Ali
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