SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : Intel Corporation (INTC)
INTC 37.81-4.3%Dec 12 9:30 AM EST

 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext  
To: wanna_bmw who wrote (162408)3/18/2002 12:53:55 AM
From: maui_dude  Read Replies (1) of 186894
 
bmw, Re : "I've been under the impression that extra metal layers are a liability, rather than an asset."

Designs could certainly absorb one or two extra layer every new process. Intel has 1 extra layer for 0.09 and that would help their design teams a lot. (BTW, I find it impossible to believe that AMD got 3 additional layers on their .09 process - somebody must be counting poly as a routing layer). At smaller processes like 0.09, the shielding of signals becomes critical (due to cross-check problems). You start needing additional layer just to keep your logic of larger processes functional (like routing to repeaters, decoupling capacitors, etc). At .13 and lower, interconnect is a big limitor (not devices) and the more the metal layer available the merrier to help improve die size, functionality and productivity. My guess is that the cost for 1 additional layer is insignificant compared to the gains from it.

Maui.
Report TOU ViolationShare This Post
 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext