Morgan is 106mm2 versus 128mm2 for Palomino. This is 22mm2 for 192KB L2 cache. AMD estimates 90nm the die size of Clawhammer at 64mm2. Add 768KB of L2 cache at the same size as 768KB L2 cache at 180nm and this increases to 86mm2. The circuitry for the extra memory controller and extra HTT ports(s) would increase the die size even more.
An optical shrink from 180nm to 130nm would result in a die size 169/324 times as large, which would be a shrink of about 48%, the shrink from 130nm to 90nm would be 81/169, which would be about 52%. Thus, with Palomino being 60% larger than Thoroughbred, we could expect the 130nm Sledgehammer to be about 73% larger than the 90nm Sledgehammer. Just assuming 86mm2 for the 90nm Sledgehammer would therefore imply about a 148mm2 130nm Sledgehammer.
BTW, just as I suspected that Palomino was actually larger than Thunderbird because of AMD avoiding all reference to die size, I am now beginning to suspect that Clawhammer will have only 256KB of L2 cache because AMD freely talks about the amount of L2 cache on Sledgehammer, but has yet to disclose the amount of L2 cache on Clawhammer. That is why I base my calculations on Sledgehammer having 768KB more L2 cache than Clawhammer. If Clawhammer really does have 512KB L2 cache, 130nm Sledgehammer will probably come in closer to 137mm2.
You're predicting these things far too closely. You must be an AMD employee, plant, or stooge.
See how freaking dumb that sounds, as it did for those accused of being same with Intel?
Keep up the good work. This thread is open, and even accepts OFF TOPIC. Nobody gets banned, like TC was, WITHOUT THE OFFENSE EVEN BEING STATED IN THE REQUEST FOR VOTE. Talk about a Kangaroo Court!
Tony |
