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To: combjelly who wrote (163629)4/6/2002 9:02:17 PM
From: wanna_bmw  Read Replies (1) of 186894
 
Combjelly, Re: "As far as the errata, yes it is the logic design and not the process. But it is easier to debug the individual cells if you aren't going over them and tweaking the transistors."

I don't understand what you are saying. When you debug a post silicon problem, it has nothing to do with tweaking any sort of transistors. Whether the design used custom or standard cell libraries, it will be completely transparent on the system level. Yes, there are other kinds of validation on the transistor level, but those validators don't list their problems amongst "errata".

I believe you might be confusing two different levels of validation, and somehow trying to argue the advantages of a cell based design at the same time. My suggestion is that you stop trying to argue on topics that you don't fully understand.

wbmw
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