Edge handset algorithms tackle architecture impairments
commsdesign.com
By Patrick Mannion
EE Times
April 16, 2002 (11:46 a.m. EST)
MANHASSET, N.Y. Comsys Communications & Signal
Processing Ltd. (Herzelia, Israel) has announced a set of
high-efficiency DSP-based algorithms for Edge handsets. Tested
with a direct-conversion RF front end, the algorithms have
demonstrated the ability to overcome the direct-conversion radio
architecture's demanding impairments while still obtaining a
signal-to-noise ratio up to 8 dB over specification.
Comsys is pushing the algorithms, called Edgeware, as the de facto
standard for physical-layer Edge processing, promising high
efficiency, RF front-end agnosticism, low processing overhead (in
Mips) and minimal memory requirements. The demonstration is
proof, sooner than many expected, of the viability of the Enhanced
Data Rates for GSM Evolution, or Edge, standard, said Ronny
Gorlicki, Comsys' executive vice president of sales and marketing.
Comsys put Edgeware through its paces at the recent Cellular
Telecommunications & Internet Association show in Orlando, Fla.,
with a direct-conversion radio. However, the algorithms have also
been tested with different sets of emulators, both handset and
basestation, with a series of RF boards. A direct-conversion radio
(DCR) was chosen to prove out the algorithms' capabilities under
the most demanding impairments, the company said.
"Direct-conversion [or zero-IF] radios are the most popular technology for the coming Edge handset RF designs due to their low cost," said Ron Cohen, president and co-founder of Comsys. "However, they
introduce some harsh impairments to the received signal, such as dc offsets." These offsets can be both
static and dynamic, Cohen added, and are compounded by other DCR-specific issues such as phase
imbalance and gain mismatches.
These problems can be ignored in a Global System for Mobile Communications (GSM) handset, he
said, because of the type of modulation and signal used. But "the 8PSK-modulated Edge signal is much
more sensitive to hardware impairments in general," said Cohen. As a result, the signal-to-noise
margins needed are much higher and are channel dependent. "Hence, the implementation of an Edge receiver is an order of magnitude more complex than GSM/GPRS [radios]," he said.
With patents pending, much of Comsys' intellectual property remains under wraps. But Cohen said that
"the strength of Comsys' algorithms is in our capability to handle all worst-case conditions for dc offset
tests with real-life RF and still maintain very high margins over the standard requirements on all line
conditions."
With a single-slot Edge implementation using a Texas Instruments Inc. C54x DSP with a hardware
Viterbi accelerator and 50 kbytes of RAM, the algorithm took 38 Mips to demodulate the signal "and it
did this with an S/N margin of 2 to 8 dB, depending on where on the specification tables you compared
it," said Cohen. "A full, four-slot implementation would take 120 Mips out of a TI C55x DSP."
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