Re: "Wrong.
Inbounded memory Write does not need to flash cache lines
since it makes no sense in first place - the flushed
data will be over-written anyway. The only thing a CPU
does it marks the corresponding cache line as "invalid",
so when the CPU needs the same data, the BUI will read
them from memory."
Poor, Ali.
You try to nail me for semantics, but you obviously have trouble with simple acronyms. You do know what a Bus Interface Unit is, do you not? I only ask because it seems you were confused, and called it BUI. Maybe the problem is that you have only read books, such as "PentiumPro and Pentium II System Architecture", ISBN 0-201-30973-4, Addison-Wesley, rather than getting real world experience.
Also, flushing the cache line means that if modified, it will get written back. Flushed lines that were in other ownership states simply get marked as invalid. In your example, another agent that reads from memory may allow the other CPU (the one that currently owns the cache line) to go into shared state. Another option is an extension to MESI protocol, which allows previously modified data to go into a fifth ownership state. AMD employs this method, as it saves bandwidth by limiting cache write backs. Thus, flushing is not always required when handling reads from other bus agents. You would know that if you really had the experience that you claim. Also, MESI cache protocol is not limited to the Pentium Pro and Pentium II. You really should broaden your horizons. Read more books, perhaps, or simply get an actual job working in the field.
Let me know if you need anything else explained to you. It would be my pleasure.
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