Thread, AMD's Hammers likely to be delayed:
Another word... "ouch!"
Here's some interesting points:
"The systems and the process appear to be far from ready, with one of these sources telling the INQUIRER that AMD was experiencing some real difficulties moving from .18 micron to .13 micron technology, and that it needed to put quite a few elements in place before yields and performance were sufficiently good for volume shipments."
I've been saying all along SOI has a lot of trade-offs and has never been implemented in HVM. Hopefully they'll be able to work out the rest of the bugs.
"Further, he said, that was also having an effect on AMD's move to the Thoroughbred core, and if this information is accurate – and we have little reason to doubt it – that will have a serious effect on delivery."
The speed grades announced thus far have been pathetic, and as AMD pushed gate lengths just about as far as is possible with current lithography, again, it's not a big surprise.
"According to her, AMD has not yet decided on some basic elements that it needs to get in place, including chassis types for two way, four way and other server systems. That's an important element because the type of market it is selling into will need to know this information well in advance.
"Further, she said, and largely because of AMD's relative inexperience in this marketplace, it appeared to have no clear idea of the problems involved. It was not, for example, supporting SSI."
A lot of regulars on this board have been ignoring issues like this for months now. It seems like AMD has as well, unfortunately. The CPU market isn't a world of "build it and they will come." AMD may be learning this the hard way. |
