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To: Ziad Hatab who started this subject6/13/2002 11:27:12 AM
From: Ian@SI  Read Replies (1) of 2006
 
A couple positive stories at the SBN site on ALD...

siliconstrategies.com

Samsung outlines high-k chip technology using atomic layer deposition

Semiconductor Business News
(06/12/02 09:50 a.m. EST)

SAN JOSE -- In what could be a breakthrough in the high-k dielectrics arena, Samsung Semiconductor Inc. here today announced the development of a next-generation wafer processing technology using atomic layer deposition (ALD).

Samsung claims it has develop a hafnium dioxide­aluminum oxide laminate film, which is fabricated on the silicon wafer using ALD. The company's technology produces a higher capacitance and decreases the number of process steps for capacitor formation.

Geared to replace silicon dioxide-enabled gates in devices, ALD is an advanced technology enabling the controlled growth of thin films by a self-limiting growth mechanism. With ALD, an ultra thin film on the order of only several angstroms can be deposited to form the capacitor dielectric of a memory component, or the gate dielectric of a transistor.

The low thermal budget from ALD technology is ideal for use in memories and System on Chip (SOC) devices, according to the San Jose-based company. Samsung's hafnium dioxide-aluminum oxide laminate film satisfies the equivalent oxide thickness (EOT) requirement for both memory and SoC.

The capacitor dielectric of memory devices and the gate dielectric of low power consumption SoC devices are required to be 1.0- and 1.4-nanometers thick, respectively, for 70-nanometer process.
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