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Technology Stocks : Advanced Micro Devices - Moderated (AMD)
AMD 215.51+0.2%12:02 PM EST
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To: Joe NYC who wrote (83134)6/20/2002 9:50:27 PM
From: ElmerRead Replies (2) of 275872
 
I could understand if the question was about the size of the core, where a defect renders the chip useless. But increasing the size of the cache does not have the same effect on yields, since there is some redundancy in L2 cache.

It is very likely that the L2 is at it's maximum size now without adding another clock. That's why P4's L1 stays at 20K and that's why you see or will see L3 cache controllers on Intel's large cache Xeon P4s and Itanium2s

EP
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