My apologies since Yousef did an excellent job of addressing this. I am just to lazy to delete the post below. Personally, I also agree with Yousef on TEL and DNS but give the edge to DNS with ISI coming in second. I have always been impreseed with their systems. This is the up and comer, IMO.
Also, Brian, I wish I had internet access prior to now. The CMP publication you want had a gazillion subscription forms at the show for free sign up. I need to check my bags of "goodies" to see if any forms fell into it.
Now, my .02 worth.
"No one really thought about the problem of needing more filter modules, more coaters and more resist tracks. We need to get more density in equipment..." One major problem is the throughput gap resulting from steppers processing 80 wafers an hour and resist tracks, which at 60 wafers an hour can't keep up. "If you try to put in more resist tracks and more filters and coaters to keep pace with steppers, you add more cost and reliability can go down," ... Also floor space for all the new equipment becomes a headache, he added.
I have always stated that the litho tools were the capacity limiting tools of a wafer fab. The tracks could always out process the steppers and now the tables are beginning to turn. However, this was anticipated and that is why you see this next generation of cluster tools with multiple hot plates and proces modules, ala FSII. Now that thropughput has improved, you may be able to increase wafer starts within an existing fab until you find the next capacity limiting tools.
On the conservative side, if starts are not increased, you only need 3 DUV systems with 80 WPH throughput instead of 4 steppers at 60 WPH. You could have a "cost savings" here if you keep starts constant. It all really depends on strategy. IF it were me, I would be looking at my capacity models and see where the next capacity limiting step is and adjust accordingly.
The third side of the coin is that the controls required for DUV resist processing may require more sophisticated track systems or a decision could be made not to run DUV and I-line resist down the same set of tracks for the dispense part of the process. I see no issues at develop though. In other words, I can validate each side of the discussion.
Answers to your questions:
1. Possibly since their are a few more tricks that still need to be investigated, one that even includes film deposition techniques. The article was right on concerning the COO (Cost of Ownership). These are important factors, as I have always pointed out. INTC is working in this area very aggressively since they will use massive amount of systems for their fabs.
2. Nothing like stabbing someone in the back. I think the ALMS is an ASMLF product and the article is just worded poorly. ASMLF wants to mix and match with their own lower end systems.
3. Because of floorspace considerations, any increase in wafer starts resulting form more stepper throughput and a need for more resist processing (given no other constraints exist in the other parts of the process) would benefit the high throughput systems like FSII. To be honest, I was not impressed with the SVGI systems I saw at SEMICON as much as some of the other players in this field. Just my opinion.
Andrew |
