SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : Intel Corporation (INTC)
INTC 36.15-0.6%Dec 24 12:59 PM EST
 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext  
To: Tenchusatsu who wrote (170456)8/31/2002 9:34:10 PM
From: Dan3  Read Replies (2) of 186894
 
Re: I think it's the L1 caches, especially the trace cache, that is suffering from thrashing. When you have multithreading, you want your caches to be large and flexible

Athlon has a 128K L1, P4 has 8K plus the trace cache (equivalent of about another 8K). So Athlon's L1 is 800% the size of P4's L1, and Athlon has 50% more execution units and 88 rename registers (I don't know how many rename registers P4 has).

Of the two chips, the Athlon core looks like a far better candidate for hyperthreading.
Report TOU ViolationShare This Post
 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext  

HomeMailHotSubjectMarksPeopleMarksKeepersSettings
Terms Of UseContact UsCopyright/IP PolicyPrivacy PolicyAbout UsFAQAdvertise on SI
© 2025 Knight Sac Media.  Data provided by Twelve Data, Alpha Vantage, and CityFALCON News