Amkor, Sharp Team for Stacked Package Designs
Online staff -- Electronic News, 3/6/2003
Aimed at creating a industry standard, Amkor Technology Inc. and Sharp Corp. have agreed to unify the design for 3D system in package assembly that allows the stacking of very thin packages.
Targeting ASICs, DSPs and memories for the cell phone, PDA and digital still camera markets, the two companies will develop and enhance a standard industry stacked package format using Amkor's stackable etCSP package and Sharp's package stacked CSP.
The first proposal for the new package format, dubbed 3D-SiP, will be to standardize the terminal position of individual, stackable packages containing ASIC and memory devices, the companies said, adding that a standard is a clear advantage for those in the 3G cell phone market, where a broad range of functionality is possible within a limited area because of the flexibility in stacking a wide variety of devices.
"As the cellular phone market moves toward 3G, and mobile applications like PDAs combine networking and graphic processing capabilities, they will require multiple ASICs per device," said Mike Steidl, Amkor's VP for advanced product development, in a statement. "Given the high cost of system-board real estate, packaging areas need significant reduction. Stacking complex memory devices on baseband ICs or ASICs eliminates the need for additional packaging area, even if another memory device is added for high-density memory."
Using the 3D-SiP format, individual packages can be stacked onto one another, making it easy to combine LSIs such as ASIC and memory devices. The new technology will help reduce development time of devices because customers can utilize and stack the existing packages already qualified individually when a new product is developed, Sharp said.
"Over the past 20 years, advancements in packaging density have concentrated on reducing package area," said Morihiro Kada, Sharp's general manager for packaging development department, in a statement. "Sharp has been developing not only chip stacked CSPs but also stackable packages for such needs as high density board assembly. By using 3D-SiP, more complicated functions and higher density systems are available while maintaining device performance and reliability. By having access to a global standard in 3D-SiP design, end customers can benefit from the convenience in motherboard designing, and multi-sourcing components." |
