IDT Expands TeraSync Family with New Quad/Dual FIFO Products
Monday March 17, 7:45 am ET
Industry's Fastest and Densest FIFO Products Support Multiple Data-Stream Applications with Fewer Parts, Enabling Savings in Board Space and Overall System Costs
SANTA CLARA, Calif.--(BUSINESS WIRE)--March 17, 2003-- IDT(TM) (Integrated Device Technology, Inc.; Nasdaq: IDTI), a leading communications IC company, today extended its leadership position in FIFO technology with the introduction of new high-speed TeraSync(TM) quad/dual FIFO products. The new FIFO products provide two or four TeraSync FIFOs in a single package, thereby reducing board space and overall system costs. The TeraSync quad/dual FIFOs are available in 1.25-Mbit (327K x4 or x2), 2.5-Mbit (655K x4 or x2) or 5-Mbit (1.25M x4 or x2) total density versions. Each FIFO operates independently and is capable of running at 200 MHz in either single-data-rate (SDR) or double-data-rate (DDR) mode. The new TeraSync quad/dual FIFOs are ideal for applications where data-stream convergence and parallel buffering of multiple data paths are required, including bandwidth-demanding communications systems, data acquisition systems and medical equipment.
"Systems with several data paths require multiple buffers, and this has traditionally required one FIFO device per data path," stated Michael Olsen, director of strategic marketing for the IDT FIFO division. "Designers can now use our industry-leading TeraSync FIFOs to support up to four data paths in a single device, while taking advantage of the products' superior speed and performance. Offering multiple TeraSync FIFOs in a single device enables customers to achieve a tremendous amount of board-space savings by reducing the system design's chip count, which can improve overall board reliability."
With the TeraSync quad/dual FIFOs, each internal FIFO has its own discrete read and write clock, independent read and write enables, and separate status flags. While the density of each FIFO is fixed, each of the four FIFOs can be configured independently with its own data rate (SDR at 2 Gbps or DDR at 4 Gbps), clock frequency and bus width. If the quad mode is selected, the device will have a total of eight clock domains -- four read and four write clocks. Also while in quad mode, each of the ports has four separate 10-bit-wide FIFOs. Data can be written into any of the four FIFOs totally independent of any other port and, similarly, data can be read from any of the four FIFOs independently from any other. In dual mode, there are a total of four clock domains -- two read and two write clocks. Additionally, in dual mode, all the input and output ports have bus-matching capabilities of x10 or x20 bits wide.
The IDT TeraSync quad/dual FIFOs have the capability of operating their I/Os at 2.5-volt LVTTL, 1.5-volt HSTL or 1.8-volt eHSTL levels. This unprecedented level of flexibility allows designers to select one of three voltages, connecting up to eight different clock domains while running up to four channels totaling 16 Gbps, all in a single package. The ten-bit bus offers a perfect interface to several leading A/D converters, allowing streaming data flow from data acquisition, medical imaging and other applications. The ten-bit bus also provides the ability to tag packets or frames with one bit signaling the start of the packet/frame, and the other signaling the end.
Pricing and Availability
Pricing for the new TeraSync quad/dual FIFOs ranges from $53.53 to $69.64 each in 10,000-piece quantities. All of the configurations listed below are available now in production quantities.
Part # Technical Packaging Product Price/Qty.
Specs Type Available (10K Units)
----------------------------------------------------------------------
72T54262 5 Mbit 324-pin Now
(1.25 Mbit x4 or x2) plastic BGA
SDR/DDR @ 200 MHz $69.64
----------------------------------------------------------------------
72T54252 2.5 Mbit 324-pin Now
(655 K x4 or x2) plastic BGA
SDR/DDR @ 200 MHz $66.90
----------------------------------------------------------------------
72T54242 1.25 Mbit 324-pin Now
(327 K x4 or x2) plastic BGA
SDR/DDR @ 200 MHz $53.53
----------------------------------------------------------------------
The IDT FIFO Leadership
As the FIFO market leader, IDT develops products and technologies to help designers solve inter-chip communications problems such as rate matching, data buffering, bus matching and data priority managing. IDT provides the most extensive product portfolio with more than 350 synchronous, asynchronous and bi-directional FIFO offerings.
Through the decoupling of clocks and buses, the IDT family of TeraSync FIFOs enables high-speed and high-density data buffering to enhance overall system performance. As an advanced feature, the TeraSync FIFO devices offer double-data-rate to single-data-rate matching, which allows one port of the device to operate in double-data-rate mode, while the other port operates in single-data-rate mode.
The IDT multi-queue FIFO was awarded the EDN Hot 100 Products 2001 award, showcasing the company's innovation and market leadership in the FIFO arena.
Additional information about these and other IDT FIFO products can be found on the IDT Web site at idt.com. High-resolution, downloadable photos of the synchronous dual-port products are located at www10.idt.com:81/pressroom/imagebank/products.cfm.
About IDT
www.idt.com
IDT, TeraSync and Interprise are trademarks and the IDT logo is a registered trademark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners.
--------------------------------------------------------------------------------
Contact:
IDT Corporate Communications
Darlene Perry, 408/492-8622
darlene.perry@idt.com
or
Porter Novelli
Ricky Gradwohl, 408/369-1500 x31
ricky.gradwohl@porternovelli.com
--------------------------------------------------------------------------------
Source: IDT |
