EDA Tools -- Part Four: Design For
Production: Manufacturability is taking
center stage
While the industry has devoted considerable work to bringing testability into the
design cycle earlier, the question of manufacturability has all too often been pushed
to the sidelines. But design complexity and time-to-market pressures are making
design for manufacturability (DFM) a critical issue for printed-circuit boards and
deep-submicron ICs.
The first DFM question is obvious: Can the board or device be physically
manufactured? For the vast majority of board and chip designs, the answer is yes-but
often at a much higher cost than if the designers had been aware of manufacturing
issues from the outset. And when the manufacturing costs or procedures become
prohibitive, design respins are sometimes needed.
In the board-design world, fabricators and assemblers must run a variety of
manufacturability checks that EDA tools rarely anticipate. But the biggest single
problem, many experts say, is the lack of data transfer between EDA and
manufacturing. "At the end of the day you send out a machine language called Gerber,
and then the board is completely re-engineered at the manufacturing stage," said
Dieter Bergman, technical director of the Institute for Interconnecting and Packaging
Electronic Circuits (IPC; Northbrook, Ill.)
Boards aren't literally redesigned, but fabricators have to spend a lot of time
reconstructing such lost information as electrical connectivity, Bergman explained.
"We waste $150 million every year on this problem in the United States, and the same
thing happens in Europe and Asia."
With chip design, DFM is primarily a matter of accounting for process variations.
According to Peter Hopper, manager for technology CAD (TCAD) at National
Semiconductor Corp. (Santa Clara, Calif.), design engineers need to include
worst-case timing data in their simulations to account for such vagaries.
"In the past this has been a major problem," said Hopper. "At National we are taking
this whole issue very seriously, and we are taking very significant steps to reduce
the number of design cycles by introducing DFM techniques."
Fortunately, solutions to the DFM problem are starting to emerge. For example, some
pc-board CAD vendors are starting to implement links to the manufacturing world, and
a few computer-aided manufacturing (CAM) vendors are developing software for board
designers. In chips, designers can choose from an increasing number of interfaces
between TCAD and EDA tools.
Birth of a standard
An emerging standard may solve the data-transfer issue in board design. A
Darpa-funded project called Electronic CAD-CAD Exchange (ECCE) is seeking to use the
Electronic Design Interchange Format 4 0 0 standard as a mechanism to carry complete
design data, including electrical connectivity, to the manufacturing world. It will
link to a CAM information model, called GenCAM, under development by the IPC.
Bergman said ECCE will address seven areas: board manufacturing, board test, board
assembly, assembly test, lists of materials, drawings and assembly notes. He said
ECCE developers are shooting for proof of concept by the end of 1998 and that IPC
hopes to release GenCAM documentation in mid-1998.
A larger task, however, is simply educating board designers about the manufacturing
process. "Many designers have never been in a board- fabrication or assembly
facility," said Gary Ferrari, executive director of the IPC Designer's Council.
"They're trying to design a board and they've never seen how it's manufactured."
The IPC, a nationwide organization of board designers, is offering educational
seminars through its local chapters and has developed a study guide with a glossary
of terms (see www.ipc.org). "Some of the killers are just terminology," said Ferrari.
"Parts of the country talk about conductors on boards, and everyone knows those are
the things that interconnect between components. But if you go up to New England they
call it 'etch.' I'm under the impression that etch is the solution they put in tanks
to create the board."
Lost data
One of the few board designers to have worked in a manufacturing shop is Rick
Hartley, who is now a pc-board hardware engineer at telecommunications provider
Applied Innovations (Dublin, Ohio). Hartley agreed with Bergman that missing data is
the biggest single problem fabricators and assemblers face. In his experience,
Hartley said, it's not uncommon for manufacturers to spend several days
reconstructing lost data for a given board.
Hartley also cited a number of typical DFM problems. Fabricators often have to cope
with an imbalance of copper on layers, holes that are too small or lines that are too
fine, he said. On the assembly side, common problems include incorrect IC patterns
and parts that are too close together, so they have a "shadow" effect during wave
soldering.
Steve Thatcher, vice president of operations for Praegitzer Industries (Redmond,
Wash.), sees a lot of recurring problems in his company' s fabrication facility.
These include clearances, line and space densities that are beyond fabrication
capabilities and specifications for costly, exotic materials that provide little
added value.
Fabricators run CAM design-rule checking (DRC) software to screen out such errors. "I
would say that virtually every board has something that comes up on a DRC prompt,
although it's not always very serious, " said Thatcher. Designers can help by
understanding manufacturing design rules for such things as spacings, trace widths
and annular rings, Thatcher said, emphasizing that these aren't the same as the
electrical design rules that EDA tools check.
On the assembly side, inconsistent data is a big problem, said Bill Wissick, director
of design at Solectron Corp. (Milpitas, Calif.). "It is almost a given that the bills
of materials and the CAD design data will have problems with them," he said. Parts on
a bill of materials often don't match the CAD data, he noted, because two different
organizations- engineering and procurement-are typically involved.
According to Wissick, typical design problems include pads that aren' t designed for
solderability, inadequate component-to-component or component-to-board edge
clearances and misorientation of parts for wave soldering. "I think 80 to 90 percent
of the designs could be improved, although it's not the case in all designs that the
trade- off in yield would justify a redesign," Wissick said.
As one of the largest board assemblers in the United States, Solectron' s goal is to
work directly with designers to ease DFM problems. This consultation ideally starts
well before layout, Wissick said.
Tools address problems
Praegitzer is a large pc-board design service bureau as well as a manufacturer, and
to help prevent DFM problems, the Redmond division is providing its own designers
with the Enterprise 3000 manufacturing simulation product from Valor Computerized
Systems (Lake Forest, Calif.). This product comes from a CAM vendor, and it provides
what are essentially CAM design-rule checks for board designers.
Since Praegitzer first started using the Enterprise 3000, Thatcher said, it has
documented many cases where designs would have been scrapped had they not gone
through the program. Enterprise 3000 also addresses the data-transfer problem,
because Praegitzer internally can just transfer Valor databases instead of Gerber
files, Thatcher said.
Meanwhile, many pc-board CAD vendors are starting to address DFM issues. For example,
Zuken-Redac (Santa Clara) has a design-technology library that includes manufacturing
rules such as via size and spacing, component rotations, pad sizes, and acid-trap and
drill-hole checks. The company also offers a Panel Editor for creating manufacturing
panels, a Sequence Editor for generating assembly-machine programs and an Advisor
Framework for measuring design compliance to chosen DFM rules.
Xynetix Design Systems (Fishers, N.Y.), formerly Harris EDA, brings manufacturing
concerns forward to logic design with the EDAnavigator 2.0 product. This offering
includes a constraint manager that can capture DFM rules and also provide real-time
feedback if an engineer violates a constraint while placing a critical component.
Through its recent acquisition of Royal Digital, Mentor Graphics Corp. (Wilsonville,
Ore.) offers Scepter, a product intended for both designers and manufacturers.
Scepter takes electrical, placement and layout information from a CAD database and
transforms it into a relational database for checking, viewing and editing
capabilities.
Two modules are available: Scepter DFF (design for fabrication) and DFA (design for
assembly). Designers can use these tools to check for manufacturing errors such as
net air-gap problems. If their board manufacturer also uses Scepter, it can function
as a data-transfer mechanism. Only a few manufacturers-including Praegitzer's White
City, Ore.,division and Data Circuits (San Jose, Calif.)-currently use Scepter.
Telecom verification
Another user is Cabletron Systems Inc. (Rochester, N.H.), which uses Scepter as a
Gerber verification tool on the company's complex telecommunication pc boards. Tim
Pinkham, senior EDA engineer, said that board designers at Cabletron use Scepter to
verify the integrity of Gerber files before releasing them to board-manufacturing
facilities. Among the checks are net-list verification, shorts and opens, and
numerous checks against the rules in the design database.
"Before using this Gerber verification methodology, we had discovered some
post-Gerber-related issues that could have created problems on some of our boards,"
said Pinkham.
While a relatively small number of boards had problems, he said, the cost in time of
even one unmanufacturable board is significant in this very competitive market space.
Since few board manufacturers can directly interpret the Scepter data format,
Cabletron hasn't had the opportunity to send Scepter files to its manufacturers. But
Pinkham believes the tool would help.
"We're sending in excess of 20 files to a manufacturing house," he said. "With
Scepter we could potentially do it with one or two [files]. " In the future, Pinkham
would like to see Scepter provide more support for high-speed design-rule checking.
Copyright c 1997 CMP Media Inc.
Richard Goering, EDA Tools -- Part Four: Design For Production: Manufacturability is
taking center stage., Electronic Engineering Times, 07-28-1997, pp 83.
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