Intel Corporation (INTC) Message Board

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Technology Stocks : Intel Corporation (INTC)

INTC 36.71

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To: Tenchusatsu who wrote (177942)	5/12/2004 1:41:29 PM
From: TigerPaw	Read Replies (2) of 186894

The advantage is the shared L2 cache. Imagine one core reading a chunk of data, and another core updating that same chunk of data. How often does that really happen? Usually a process is running, then stalls, then runs again perhaps on the other core. The cache can help the swap only if it is large enough to hold the process data plus the data that caused the stall. It really gets tricky when you have dual chips (even if they have dual cores). The coherency checking has to take place over the external bus even in the case where the data is correlated within the same dual-core chip. This may likely lead to conditions where a 4P (two dual cores) Intel runs slower than a 2P (one dual core) Intel. TP

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