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Microcap & Penny Stocks : JAVA Chips: SUNW, Shboom etc. "What's the future Hold?"

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To: Scott Maxwell who wrote (4)8/2/1996 5:25:00 PM
From: Starlight   of 30
 
Scott - The advantage of ShBoom over other chips is the speed and effeciency at which it processes the Java language. I copied this from the PTSC webpage:

Java on Patriot's PSC1000 (ShBoom TM) Microprocessor
February 1996

IBM, Netscape, Microsoft, Oracle, and many other industry leaders have licensed Java and see the future of the Internet in it.

About Patriot's PSC1000 Microprocessor

The ShBoom microprocessor architecture consists of a highly integrated 32-bit RISC processor that offers high performance at low system costs for a wide range of applications. At 100 MHZ internally, the a ShBoom architecture processor executes with 100 native MIPS peak performance.
The PSC1000 is the first commercially available silicon implementing this architecture.

Conventional high-performance microprocessors are register-based with large register sets, and are pipelined or superscalar. These complex architectures consume costly silicon with multiple-operand instructions, multiple execution units, or lengthy execution pipelines. All these features diminish the fastest possible execution of individual instructions and increase silicon size, thus increase chip cost.

The ShBoom architectural philosophy is that of simplification and efficiency of use. A zero-operand design eliminates most operand bits and the decoding time and the instruction space they require. Instructions are shrunk to 8-bits, significantly increasing instruction bandwidth and reducing program size. By not using pipeline or superscalar execution, the resulting control simplicity increases execution speed to issue and complete an instruction in a single clock cycle--as often as every clock cycle--without a conventional instruction cache. To ensure a low-cost chip, a data cache and it's costs are also eliminated in favor of efficient register caches. The top eighteen elements of the operand stack and the top sixteen elements of the local register (variable) stack are cached on chip.

The speed/performance/cost characteristics of the PSC1000 are also well suited for applications like
Internet engines, motion controllers, industrial controllers, digital communications equipment, robotics, laser printers, video games and TV set-top boxes.

Why is the ShBoom architecture so good at Java?

Because our patented silicon implements the Java Virtual Machine! Java is designed to run on a stack oriented architecture resulting in the ShBoom architecture being the optimal runtime platform.
The zero-operand, 32-bit, stack oriented ShBoom architecture is ideally suited to operate the Java Virtual Machine, executing many Java byte codes in a single instruction cycle! Our CPU is byte coded with a stacked ALU, local register stack, and sixteen global registers. The semantic gap between the patented ShBoom architecture and the Java Virtual Machine is very small.

As an example consider the Java IADD byte code and compare it with the code size and memory cycles for several popular processors. Determining exactly how long a given processor will take depends on a number of variables; e.g. pipeline effects, code preceding and following, and frequency of cache misses for code and data. A rough estimate is the number of instructions or the
number of memory cycles required, whichever is larger, divided by the instruction clock speed for
RISC--and, instructions plus memory cycles divided by clock speed for CISC. This estimate assumes all memory access hit on-chip cache.

(note - There's a table that didn't reproduce here which is very important to this data. It shows the comparison speeds of various computer chips to the ShBoom. ShBoom was much faster than the Pentium at executing Java. See the PTSC website.)

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There's a lot more on the webpage about ShBoom. www.ptsc.com

Betty
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